SUTD researchers develop a novel reconfigurab

A key goal of computing research is to develop high-performance, energy-efficient computing devices, ie. devices that consume little power, but also calculate information quickly. A possible way to achieve this goal is the memory components and units that combine shift register operations.

Most computing devices consist of a memory component and a processing unit that are physically separated. However, in order to significantly simplify these devices and reduce their power consumption, a device was developed that could perform both functions efficiently – the switchable memory register architecture.

Traditional register-in-memory architectures have limitations, although some of these architectures show promising results. The limitations include the use of many devices and the requirement to convert the electrical resistance into electrical signals.

Based on phase change alloys, materials that reversibly transition between the amorphous glass state and the ordered crystalline state, researchers at the Singapore University of Technology and Design (SUTD) have developed a new reconfigurable memory board architecture. Their device works as a reconfigurable memory component and a programmable shift register and was introduced in a paper published in Advanced Intelligent Systems.

The term “matter (M) state based shift register” was used to describe the shift memory register device developed by the researchers. The four material states, ie, amorphous state, fully crystalline state, partially crystallized state and primary state, of the phase change material (representing different switching/memory modes) were used to operate the device.

The device can be changed to perform relay or memory functions and is easy to program due to its special design. The researchers showed that the device performed admirably for both functions in preliminary tests.

“While the device is functioning as a memory, the device can be switched from the disordered glass state to the crystal state with 1.9 ns pulses, which is about one-third shorter than those of existing devices with germanium antimony diode layers doped with nitrogen; and show a reset energy of 2 pJ. Acting as a shifter, the device can be switched between serial-in-series-out mode and serial-in-parallel-out mode, with a single cell, and display many levels of resistance, which have not been shown before,” a said SUTD Assistant Professor Desmond Loke, who is the study’s principal investigator.

To significantly reduce the power consumption, the new shift memory register architecture proposed by the research team could be used to design a wide range of high performance electronic systems in the future. The M-state-based shift registers could be applied to a variety of operation schemes and calculations, although for the purpose of this research, the researchers demonstrated that these devices are capable of successfully performing shift register operations.

The other researchers involved in this work were Shao-Xiang Go, Qiang Wang, Natasa Bajalovic from SUTD, Taehoon Lee from Cambridge University and Kejie Huang from Zhejiang University.